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AMS Verification Architect


Source:
TIMESJOBS.COM
Location:
Bengaluru, KA
Date:
14-11-2016
Job Code:
58283481
Categories:
  • Manufacturing & Production
Applying for this job will take you to an external site
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Job Details

Your ResponsibilitiesThe position is in the Verification & Validation (V&V) team, which is responsible for performing the Analog / Mixed Signal (AMS) V&V simulations of AMS product designs, sub-systems, purchased and newly developed IP for the Automotive Market, specifically Solid State Lighting products. Architect the Verification Strategy for product or IP development, specify the methodology and propose execution strategy of products and IP to proof the functional and structural correctness before IC Mask Ordering.Define and apply appropriate verification strategies, at different abstraction levels. Define the V&V simulation infrastructure, including generation of V&V specifications, test benches, Verification IP, test cases, and reports. Support Competence development AMS V&V simulationsCoaching other Verification engineers through actively supporting them in the understanding of the design and implications on V&V Propose strategies and methods for re-use of V&V components, e.g. for regression and for out-of-the-box V&V methods for efficient delivery.bridge Verification to validation and design disciplines accountable for pre-silicon sign off, first time functional siliconExcellent communicator and team player, willing to be in testing role. At least 10 years of experience in Verification domain with at least 5 years of working experience in AMS IC Verification, preferably with a few years of Mixed signal IC design experience.A Master degree (or similar level acquired by experience) in electronics or information engineering. Knowledge of AMS IC development process, flows and IC application is a must. Experienced in and affinity with V&V simulation methods, different V&V strategies, levels and tools. Experience with digital verification is preferred; Experience with Analog Mixed signal design is a must.Good skills in Verilog (AMS) and/or VHDL, Tcl and/or Perl, Linux/Unix scriptingGood understanding of Verilog A / AMS modeling required Experience with SystemC, System Verilog, XML, Cadence EDA tooling is a plus.Your Profile Excellent communicator and team player, willing to be in testing role. At least 10 years of experience in Verification domain with at least 5 years of working experience in AMS IC Verification, preferably with a few years of Mixed signal IC design experience.A Master degree (or similar level acquired by experience) in electronics or information engineering. Knowledge of AMS IC development process, flows and IC application is a must. Experienced in and affinity with V&V simulation methods, different V&V strategies, levels and tools. Experience with digital verification is preferred; Experience with Analog Mixed signal design is a must.Good skills in Verilog (AMS) and/or VHDL, Tcl and/or Perl, Linux/Unix scriptingGood understanding of Verilog A / AMS modeling required Experience with SystemC, System Verilog, XML, Cadence EDA tooling is a plus.
Additional Degree: BE/ B.Tech (Engineering)

Experience: 10-15

Requirements

H/W Installation/Maintenance | Hardware Design
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