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Analog Design Engr, II

Bengaluru, KA
Job Code:
  • IT
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Job Details

Recent experience delivering Latest GPIO or DDR I/O designs for low power wireless devices.- Solid understanding of related CMOS and FinFET process technology and associated issues in 28nm and smaller. - I/O design methodology & flow, Calibration,understanding of analog circuitry, good understanding of ESD and LU based design concepts. Good understanding on the reliability aspects of designs such as Ageing and MC simulations. - Familiarity with ASIC flow Synopsys libraries, LEF generation, Place & Route & understanding of top level verification flow.- DDR2/DDR3/DDR4 design experience including LPDDR/LPDDR2/LPDDR3/LPDDR4. -Good Understanding of the DDR Timing, ODT and SDRAM functionality. - Familiarity with JEDEC requirements for DDR interfaces & standards; Power & Signal Integrity.- Additional preferred experience in design and development of GPIO's, Special high speed IO's such as LVDS, USB, MIPI, DigRf, PLL's, ADC, etc - Ability to foster accountability and ownership through hands-on technical leadership.- Excellent written and verbal communication skills in interactions with customers, and internal development teams. - 5+ year's CMOS/FinFET IO and Mixed Signal circuit development expertise Responsibilities- DDR / LPDDR I/O Circuit and layout design including GPIO and Special IOs.- Provide subject matter expertise and technical leadership in design of high speed I/Os such as DDR. - Work with DDR PHY team, package engineers and system engineers to meet design specifications.
Additional Degree: BE/ B.Tech (Engineering)

Experience: 10-15


H/W Installation/Maintenance | Hardware Design | Switching/Router
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