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ANALOG DESIGNERS/VERIFICATION/LAYOUT ENGINEERS


Source:
TIMESJOBS.COM
Location:
Bengaluru, KA
Date:
10-11-2016
Job Code:
58245945
Categories:
  • IT
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Job Details

Job DescriptionSpecification study, Verification Plan Development for Analog/Mixed Signal blocksBlock Modelling and Verification in Verilog-AMSChip Top level Functional SimulationSign-off against Checklist before Tape Out releaseResponsibilities Desired Skills & ExperiencePrior Analog Verification Experience up to 4 YearsAnalog Circuit Design knowledge and/or experienceExperience in Verilog-AMS/Verilog A/VHDL-AMS/Verilog/SVExperience in using Cadence Schematic Editor, ADE in a hands-on mannerMixed Signal VerificationGood communication skillsAnalog Mixed-Signal layout and verification for different complex analog circuits in 45nm node or lesser.Knowledge of half cell Tool Experience like Cadence Virtuso ,Vxl and Virtuoso, Schematic Composer, verifications tools including Assura, Mentor/Synopsys Calibre /Hercules LVS, DRC, STarRC for extraction
Degree: ME/ M.Tech./ MS (Engg/ Sciences)

Additional Degree: BE/ B.Tech (Engineering)

Experience: 5-10

Requirements

Hardware Design | RF Engineering
Applying for this job will take you to an external site

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