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Analog Mixed Signal Verification Engineer


Source:
TIMESJOBS.COM
Location:
Secunderabad, Telangana
Date:
17-11-2016
Job Code:
58309867
Categories:
  • Engineering & Construction
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Job Details

Job ResponsibilitiesThe ASIC Design Team is searching for a hands-on, team oriented, Analog Mixed-Signal (AMS) IC Verification Engineer with a strong background in top level system verification of complex mixed-signal System-on-Chips (SoCs). In this role, you will be responsible for the verification of mixed-signal integrated circuits that implement innovative touch sensing and mobile display driver technologies. As an AMS IC verification engineer, you will be an integral part of the AMS Verification group working on planning, developing, and executing pre-silicon verification as well as teaching, nurturing, and leading a small of group of junior verification engineers. The ideal candidate is a self-motivated individual, who is passionate about simulation and verification of large mixed-signal SoCs. You will work with circuit design engineers as well as system architects to define verification needs and verification plan, develop verification environments, execute verification tests, as well as maintain and support verification environments.Responsibilities includeWork with circuit design and system engineers to define verification needs and create verification plansDevelop top-down mixed signal verification strategies for state-of-the- art SoCs, using metric driven methodologiesPerform actual verification work using the test benches and strategies developedSupport of analog and digital designers in developing Verilog-A, Verilog-AMS, and System Verilog behavioral models. Ensure validity and optimize performance of designers behavioral modelsIntegration of designers behavioral model into full system verification suitesDevelop automated test benches and simulation results evaluation tools for top down block and system level verificationWrite design verification specifications, verification plans, and documentationConduct verification reviews to ensure that functional requirements are met. Provide peer review to other engineersDevelopment of tools for automated generation of verification reportsDevelop automatic regression of verification suites using Cadence AMS Designer verification flow in Incisive. Ensure the correct use of connect modulesRequired QualificationThe candidate should have excellent knowledge of analog and mixed-signal electronics. The person should have a track record of initiative and innovation in their previous design experience. The successful candidate will be highly motivated and quick to adopt new technologies. Exceptional interpersonal, time management and communication skills are critical for working with engineering Required QualificationThe candidate should have excellent knowledge of analog and mixed-signal electronics. The person should have a track record of initiative and innovation in their previous design experience. The successful candidate will be highly motivated and quick to adopt new technologies. Exceptional interpersonal, time management and communication skills are critical for working with engineering and product development groups. He/She must have the ability to multi-task, thus ensuring timely completion of several complex independent tasks.MS Electrical Engineering (or equivalent) with expertise in analog and mixed-signal CMOS IC design3-8 years of industry experience with expertise in analog and mixed-signal CMOS IC verificationExperience with Cadence Virtuoso, Incisive, AMS-Designer, Verilog- AMSExperience with behavioral modeling languages Verilog-A, Verilog- AMS, Verilog-HDL, SystemVerilogKnowledge of scripting languages such as Python, PERL, TCL, and MatlabSignificant work experience with Cadence AMS Designer verification flow using IncisiveExperience creating mixed-signal self-checking test benches that run under automatic regressionExperience working across both analog and digital design teamsStrong fundamental knowledge of analog circuits and ability to write analog behavioral models is a mustSelf-driven, able to work independently while coordinating with analog and digital block designersMust be willing and able to learn new technologyStrong knowledge and experience in RTL verification and HDL testbench creation using Verilog/System Verilog/VHDL is beneficialKnowledge with latest RTL verification methodologies like OVM, UMV is a plusDesired Qualification Verilog-A, and Verilog-AMS modeling, Integration of designers behavioral model into full system verification suitesExperience with specification, architecture, and floorplanning for mixed-signal integrated circuitsFamiliarity to top-down mixed signal verification strategies for state-of-the-art SoCs, using metric driven methodologies.
Additional Degree: BA (Arts) | B.Com. (Commerce) | B.Pharm. (Pharmacy) | B.Plan. (Planning) | B.Sc. (Science) | BBA/ BBM/ BBS | BCA (Computer Application) | Diploma-Other Diploma | B.Ed. (Education) | BHM (Hotel Management)

Experience: 4-8

Requirements

GIS | Legacy Systems | Software Engineer | System Analyst/Tech Architect
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