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Design Engineer


Source:
TIMESJOBS.COM
Location:
Bengaluru, KA
Date:
07-11-2016
Job Code:
58222898
Categories:
  • IT
Applying for this job will take you to an external site
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Job Details

Role & ResponsibilitiesCandidates should be experts in the field of physical design and timing closure. Candidates should also have some experiences on project management and will be working on place and route and physical implementation efforts to achieve the industry leading performance, power and area on cutting edge technology nodes like 16nm and 10nm. This includes1. Synthesis of RTL to Netlist 2. Setting timing constraints for place and route3. Digital block place and route with complex multi clock designs 4. Proper floor planning according to timing and power requirement5. Resolving placement and routing congestion issues 6. Providing detailed feedback to the RTL team on opportunities for improvement of the micro-architecture to aid implementation7. Provision of feedback on block specifications 8. Development of design guidelines for speed and SI9. Clock tree synthesis 10. Power grid implementation11. Power IR drop analysis 12. Close timing in both block and top level with predictable result and schedule13. Implement DFM for place and routed block 14. Implement ECO15. Top level integration of all necessary blocks 16. Run RC extraction and close timing based on post layout netlist17. Finish drc, lvs on the place and route block and resolve drc and lvs related issues 18. Write automation script to enable repeatable P&R process19. Write technical documentation Qualification & Experience BSEE/CS RequiredMSEE/CS Preferred2+ years of industry experienceCharacteristics and Requirements-Highly motivated, reliableHigh degree of initiativeGood communicator, personable, team playerAble to work and communicate at a detailed or high levelProven problem solverCo-operate & communicate well with the RTL, circuit design, and layout teamsBe motivated to continuously develop skills and accept a variety of responsibilities as part of contributing to the design centers success Demonstrate a positive attitude and respect for all members of the team Job RequirementsEssential Skills & Experience Experienced in Syntheis, Place and Route tools Experienced in ScriptingExperienced in floor planning Experienced in timing analysis and timing closureExperienced in static timing tools and flows Experienced in power analysis toolsExperienced in signal integrity tools Experienced in DRC, LVS, ERC, and extraction toolsExperienced in place and route ECO methodology Experienced in place and route 28nm and below SOC designs Experienced in place and route set up like technology files, captables etc.Knowledge of design rules for 28nm and below Knowledge of place and route tool limitationKnowledge of essential working of design views for SOC design Knowledge of ECO and place and route trade offsUnderstand power, performance, and area trade offs Understand routing congestion to help drive better cell placementAble to take on the use of new techniques and methodologies, and promote their use within the project Excellence in communication skills and team work
Degree: MCA/ PGDCA | ME/ M.Tech./ MS (Engg/ Sciences)

Additional Degree: BE/ B.Tech (Engineering) | BCA (Computer Application)

Experience: 2-6

Requirements

H/W Installation/Maintenance | Hardware Design | Switching/Router
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