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Design Engineering Manager 2

Secunderabad, Telangana
Job Code:
  • IT
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Job Details

The successful candidate will work as a contributing member and as a lead of a team responsible for the architecture and design of next generation design blocks. The area of focus will be on micro-architecture, RTL design, resolving design and architecture issues, interaction with SoC architecture team, synthesis constraint development, and timing closure activities. The candidate must have excellent inter-personal and communication skills and be able to work independently.Xilinx holds a strong position in the FPGA all programmable paradigm. This position offers candidates exposure to the latest generation IP, tools, boards, FPGA products and the ability to design and develop high speed memory IP cores. Job RequirementsB.E/M.E/M.Tech or B.S/M.S in EE/CE with 10+ years of relevant experience.8+ years of experience in designing complex blocks for SOC & FPGA.Requires proven track record in technical leadership of teams with 3+ engineers.Excellent Verilog and logic design concepts.Experience with sign off tools like DC/PTHands-on experience with lab equipment including logic analyzers and high speed oscilloscopesWorking knowledge of signal integrity methodsKnowledge of bus protocols like AXI/AHB.Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, and ModelSim.Excellent communication and problem solving skills.Should have experience working in geographically dispersed team and should be a strong team player.
Degree: ME/ M.Tech./ MS (Engg/ Sciences)

Additional Degree: BE/ B.Tech (Engineering)

Experience: 10-15


Customer Support | H/W Installation/Maintenance | Hardware Design | Network Planning
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