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DESIGN ENGR MGR 2


Source:
TIMESJOBS.COM
Location:
Secunderabad, Telangana
Date:
17-11-2016
Job Code:
58305062
Categories:
  • IT
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Job Details

Require experience with development of OVM, UVM, VMM and/or Verilog, System Verilog test benches and usage of simulation tools/debug environments.Require strong understanding of state of the art of verification techniques, including assertion and metric-driven verification. Experience as a verification architect, establishing the verification methodology, tools and infrastructure for high performance IP and/or VLSI designs is a plus.Experience with formal property checking tools such as Cadence (IEV), Jasper and Synopsys (Magellan) is a plus.Experience with gate level simulation, power verification, reset verification, contention checking, abstraction techniques is a plus.Familiarity with verification management tools as well as understanding of database management particularly as it pertains to regression management.Strong understanding of different phases of ASIC and/or full custom chip development is required.The ideal candidate is a strong team player with good communication and leadership skills and one who is able to positively and strategically influence the FPGA fabric design teams with an eye towards improving overall product quality.
Degree: ME/ M.Tech./ MS (Engg/ Sciences) | Ph.D. (Doctorate)

Additional Degree: BE/ B.Tech (Engineering)

Experience: 8-13

Requirements

Customer Support | Hardware Design | Switching/Router
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