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IPG MIG First Line CAE Manager

Bengaluru, KA
Job Code:
  • IT
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Job Details

The CAE manager role will report into the IPG MIG Program and Operations office. In this position, you will be responsible for enabling and supporting any SOC team in Bangalore, India and Penang, Malaysia, using IO blocks from our organization. Currently, we are supporting SOC from every market segment Intel supports and all Intel business units, both on internal and external process technology. This is an opportunity to apply both technical knowledge and customer enabling skills in a team-oriented environment. Our team operates in a fluid environment enabling you to engage in a diverse set of responsibilities in support of the broad set of markets Intel supports and products Intel produces. Your responsibilities will include, but are not limited to - Directly engaging our partners, mostly internal SOC integration teams, to provide post planning technical support to ensure Time to Market (TTM) production ramp - Developing collateral and supporting design integration- Replicating and debugging reported issues by identifying design issues and proposing changes - Providing technical training, consultation, and hands-on assistance to the integration teams using our IO blocks- Active participant in virtual technical teams to solve complex problems - Mentoring and guiding the broader CAE team, setting expectations and goals - Investigating, dispositioning and documenting bugs and sightings - Driving issue resolution across multiple development teams, groups and divisionsQualificationsMust have- A Bachelor of Science degree in Electrical Engineering (or equivalent) with three or more years of relevant experience- Strong engineering background with experience in silicon IO design- Excellent analytical and problem solving skills- Ability to apply critical thinking - Tolerance of ambiguity - Proven verbal and written communication skills, proficient technical writing/presentation skills- Ability to work with minimal supervision, establish-track quarterly objectives, multitask effectively - Ability and willingness to travel domestically and internationally Nice to have - Customer-facing experience- Experience in design debug, specifically active participation in full chip integration and platform power-on
Additional Degree: BE/ B.Tech (Engineering)

Experience: 3-8


H/W Installation/Maintenance | Hardware Design | RF Engineering
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