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physical deisgn

Bengaluru, KA
Job Code:
  • IT
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Job Details

Job DescriptionThe ideal candidate will have 9+ years ofphysical designexperience, with recent successful tapeouts in deep submicron technologies(45nm and below).Strong knowledge of PD construction & analysis flows and methodology. Knowledge of all aspects of ASIC physicaldesign process, from RTLdesign to ASIC bring up.- Proven ability to manage a large PD designteam. - Proven ability to execute to stringent schedule & die requirements. Strong communication skills. Able to understand the requirements of other functional teams, and ability to navigate and negotiate win-win solutions for the project.- Lead physicaldesign team with following responsibilities,.- Work independently and with multisite teams in the areas of RTL to GDSII implementation. - Well versed with Synthesis, Die estimation, partitioning, IO Planning, constraints validation, Full Chip Floor planning, Metal Layer estimation-planning, timing budget generation, power planning, IR/EM Drop Flows, Full Chip Signoff STA, Block Level Signoff STA, Place and Route, andPhysical Verification DRC/LVS/ERC, DFM.- Interface with full chip timing, block build, hard-macro, packaging, architecture, foundry, designautomation anddesign technology teams to resolve various issues in timely manner. Participate in project planning, scheduling and reviews- Help in org development, hiring, identify skill gaps and team building activities.- You will also be responsible for driving methodology development, automation, collaborate with other designteams, share best practices followed. - Experienced in industry standard tools used and their capabilities & underlying algorithms ( Synopsys ICC or SoC Encounter OR Mentor Olympus ).
Additional Degree: BE/ B.Tech (Engineering)

Experience: 2-7


H/W Installation/Maintenance | Hardware Design | RF Engineering
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