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Physical Design

Bengaluru, KA
Job Code:
  • IT
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Job Details

Block level implementation from netlist to GDS, Handling timing closure of high frequency blocks, Handling blocks of high instance counts 1M instance and above, Expertise in signoff closure Timing with SI and OCV, Power,IR and Physical Verification at both block and chip level, Understanding constraints and fixing techniques, Understanding SI prevention , fixing methodology and implementation, Proficient in layout edit techniques, Proficient in Synopsys ICC or SoC Encounter or Mentor Olympus and Atoptech tool set., Experience in Design Automation and UNIX system. Experience in Tcl/Tk, PERL is a plus.Desired Skills & ExperienceExperience level 3 13 years.Must possess hands on experience in handling block/chip level implementation from Netlist to GDSMust possess hands on experience in timing closure and physical verification closureMust have handled blocks of s 1M instances and above at frequencies higher than 1GHzUnderstand AOCV methodologyExperience in handling lower tech nodes that include 40nm,28nm, 22nm, 20nm, 14nm, etcMust have hands on tapeout experience in lower tech nodes in any of the tools mentioned such ICC or SOC Encounter.Must have the ability to think on the spot for quick solutions and work-around at the time of tapeout to hit the schedule on timeMust possess excellent scripting skills TCL or PerlExperience in Synthesis and Formal is a plusExcellent verbal and written communication skills are required. Must possess excellent debug skills, analytical skills and the ability to work independently.Must be highly motivated and possess excellent team spirit
Degree: M.Com. (Commerce) | M.Pharm. (Pharmacy) | M.Sc. (Science) | MA (Arts) | MBA/ PGDM | MCA/ PGDCA

Additional Degree: BE/ B.Tech (Engineering)

Experience: 4-9


Application Programming | Database Administration (DBA) | Network Administration | Software Engineer
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