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Principal Engineer

Bengaluru, KA
Job Code:
  • IT
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Job Details

Job Description/Responsibilities Primary Responsibilities The employee is responsible for complete physical design of multiple large & complex blocks & fullchip implementation & integration for Achronix's FPGA products in Intels 22nm and 14nm technology nodes. The employee is expected to provide technical leadership & take ownership of multiple complex design & flow challenges, which would include Floorplanning, Place & Route and CTS using physical design tools Physical verification Integration Physical Design Methodology Scheduling Mentoring individuals Provide technical leadership to the team The employee is also expected to participate & own major parts of the flow & methodology development. The employee is expected to lead interaction with design & fabrication partners. The employee is expected to mentor other engineers & new hires Skills Expertise in Physical Design activities Floor-planning, CTS, P&R, Extraction, IR drop analysis, STA, Physical Verification and Signal Integrity Expertise with Physical Design tools A strong understanding of layout DRC rules & concepts and device identification concepts Participated in at least 2 tapeouts on 40nm and below, with significant experience on 28nm and below nodes Strong programming knowledge in Perl, TCL, and/or Shell Scripting Expertise in flow development Strong Leadership skills Strong communication skills Experience/Education Previous experience in 4-5 VLSI projects in deep submicron technologies o Experience in 28nm or beyond is a plus o Experience in custom layout is a plus o Experience in Intels technology nodes is a plus o Expertise in ICC & ICV is a plus Preferred BS/MS + 8-12 years of experience in physical design
Degree: ME/ M.Tech./ MS (Engg/ Sciences)

Additional Degree: BE/ B.Tech (Engineering)

Experience: 8-13


H/W Installation/Maintenance | Hardware Design | RF Engineering
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