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RTL Design Engineers


Source:
TIMESJOBS.COM
Location:
Bengaluru, KA
Date:
18-11-2016
Job Code:
58316822
Categories:
  • IT
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Job Details

He / She will be responsible for the RTL development for IP / ASIC / FPGA.Experience in the complete front end design flow (spec to RTL / Netlist) is a must.Should be able to design, micro architect & do RTL coding, Lint, CDC.Should have good understanding of the design concepts for design having multiple clocks & clock domains & also related timings / timing closure.Exposure to FPGA design flow, ASIC Prototyping & validation would be an added advantage.
Additional Degree: BE/ B.Tech (Engineering)

Experience: 4-9

Requirements

H/W Installation/Maintenance | Hardware Design | Network Planning | RF Engineering
Applying for this job will take you to an external site

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