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Sr Corporate Applications Engr

Bengaluru, KA
Job Code:
  • IT
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Job Details

Job Duties1. As part of the customer support team, help grow customer satisfaction with Mentors DFT tools by helping them successfully deploy Automatic Test Pattern Generation (ATPG) and Built In Self-Test (BIST) tools (such as Fastscan,TestKompress, MemoryBIST, LogicBIST, BoundaryScan, SOCScan).2. Work on service requests to deliver excellent technical support in a timely manner to Mentor s customers3. Recognize and communicate potential business opportunities to support the growth of Mentors business4. Work collaboratively with field applications engineers, account teams and engineering to successfully deploy Mentor s products and services5. Some Travel would be required in this position.6. Help the account team in growing the business by increasing adoption of Mentor DFT technology at customers.7. Deliver training on Mentor s DFT tools and flows to customersJob Qualifications1. As a member of the technical support team, you will contribute to our success by helping customers deploy Mentors DFT tools efficiently. This is a challenging position that will assist in growing the DFT business in India. You will work closely with customers as well as field applications and engineering teams.2. Need excellent communication and problem solving skills, program management skills, hands-on and a self-starter, able to work independently but still build relationships with Managers and with customers.3. Knowledge and experience with VLSI design, HDL Synthesis, VLSI Testing and design for testability.4. Experience with design, simulation, verification of ASIC/VLSI circuits and systems, design verification and product test generation preferred. In-depth understanding of Design for Test (DFT) structures is required. This includes scan based testing, Memory BIST, Logic BIST, and Boundary Scan (1149.1). Knowledge of scan data compression methodologies is required.5. Preferred experience in specific areas Operating Systems UNIX, Linux, Sun Solaris.Languages Verilog (Behavioral, RTL, gate level), VHDL (Behavioral, RTL, gate level), Perl, C/C++.CAD Tools Synthesis, Simulation, ATPG, Memory BIST, Logic BIST, Boundary Scan. Familiarity with Logic BIST flows and methodologies is a plus.
Degree: ME/ M.Tech./ MS (Engg/ Sciences)

Additional Degree: BE/ B.Tech (Engineering)

Experience: 2-6


Application Programming | Software Engineer
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