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Staff Engineer


Source:
TIMESJOBS.COM
Location:
Bengaluru, KA
Date:
17-11-2016
Job Code:
58310517
Categories:
  • IT
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Job Details

Job Description Creates emulation/Field Programmable Gate Array (FPGA) models from a Register Transfer Level (RTL) design using emulation/FPGA synthesis, partitioning and routing tools. Defines and documents RTL changes required for emulation/FPGA. Develops hardware and software collaterals and integrates it with the emulation/FPGA model. Tests and debugs the emulation/FPGA model and collaterals. Defines and develops new capabilities HW/SW tools to enable acceleration of RTL and improve emulation/FPGA model usability for pre-Silicon and post-Silicon functional validation as well as SW development/validation. Develops improvements to usability by RTL validation and debugging of failing RTL tests on the emulation platform. Interfaces with and provides guidance to pre-silicon Validation teams for optimizing pre-Si validation environments, test suites and methodologies for emulation efficiency. Develops and applies automation aids, flows and scripts in support of emulation ease-of-use and improvement of equipment utilization.Processing and VLSI Design 12 years of industry experience in digital design of complex SoC IP blocks and products. Extensive experience in Cadence Emulation and Synopsys FPGA based prototyping systems. Candidate should possess strong digital design and VLSI fundamentals. Knowledge of VHDL, Verilog, C/System-C/System-Verilog/Specman, micro-architecture development, Signal processing, filters, data-path designs, communication systems standards (DSL, WLAN, Ethernet), processor IP cores (MIPS, ARC), high-speed interfaces (USB, PCIe, DDR, xGMII) and ASIC design flow (RTL to GDS) would be desirable.
Additional Degree: BE/ B.Tech (Engineering)

Experience: 12-17

Requirements

H/W Installation/Maintenance | Hardware Design | Network Planning
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