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Staff Engineer Verification

Job Code:
  • IT
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Job Details

Skills and knowledge base requirements includeKnowledge of HDL languages Verilog and/or VHDL.Knowledge and experience with VMM verification methodology.Knowledge and experience with the SystemVerilogverification languageBasic Unix/Linux Operating System understanding.Knowledge and experience developing various components of a test bench including drivers, monitors, and scoreboards.Knowledge and experience in writing directed as well as constrained random test cases.Ability to work with ASIC teams and other integration team members.Capable of assisting in determining methods and procedures to use on new projects. Highly Desirable Skills & Knowledge includeStrong scripting skills in Perl, TCL/TK, and C shell.Knowledge and experience with UVM verification methodology.Good verification test bench development skills such as defect tracking and revision control tools.Experience in use of techniques to collect code and functional coverage.Experience in use of assertions.Experience with Object Oriented languages such as C/C++.Experience with gate-level simulations.Experience with serial storage interfaces such as SATA, SAS and PCIe.Experience with ARM processors.Experience with RTL design.Knowledge of disc drive controller architecture is a strong plus.Good troubleshooting skills and ability to trace causes of a test case failure.Ability to interface effectively with many diverse groups and people across multiple locations.Self-starter and self-motivated personality is a strong plus.Position responsibilitiesWork with other Seagate engineers across multiple sites to verify IP and SoCs for use in high-volume storage devices.Development of random constrained testing with SystemVerilog using VCS.Provide support to the SoC environment in terms of overall tool debugging, script development, and revision control use.Work with Seagate and vendor design teams to ensure smooth delivery of IP verification suites into the integration environment.Writing test cases, as needed, to enhance functional coverage.Developing/assisting in the development of test bench and/or environment to support SoC and IP verification activities.May coordinate activities of other personnel.
Degree: MCA/ PGDCA | ME/ M.Tech./ MS (Engg/ Sciences)

Additional Degree: BE/ B.Tech (Engineering) | BCA (Computer Application)

Experience: 8-10


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