FIND YOUR DREAM JOB

Sign In
 [New User? Sign Up]
Mobile Version

Synthesis & Timing Closure Engineer


Source:
TIMESJOBS.COM
Location:
Bengaluru, KA
Date:
13-11-2016
Job Code:
58279161
Categories:
  • IT
Applying for this job will take you to an external site
  •  
  • Shortlist
  • Email Friend
  • Print

Job Details

Desired KnowledgeGood understanding of Digital design and timing concepts, ASIC Flow, Full custom flow. IC fabrication techniques, Designing using Verilog, Verilog for verification, Exposure to Synthesis and DFT. APR flow and Physical Verification and parasitic Extractions.Desired skillsCandidates who have completed their PG/Advanced Diploma from reputed centers, engineers who have Done UG/PG projects in VLSI or Embedded Systems will be given a preference.Other SkillsExcellent communication skills, team player, professional work ethics, knowledge of EDA tools from Cadence, Mentor Graphics And or Synopsys. Perl/Shell Programming. Working knowledge of Linux is highly desirable. Such experience from reputed finishing Schools is recognized.
Additional Degree: BE/ B.Tech (Engineering)

Experience: 2-7

Requirements

Embedded Technology | Hardware Design | RF Engineering | Switching/Router
Applying for this job will take you to an external site

FEATURED JOBS

© Copyright 2015 Al Nisr Publishing LLC - powered by Gulf News