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Verification Engineer


Source:
TIMESJOBS.COM
Location:
Secunderabad, Telangana
Date:
15-11-2016
Job Code:
58295732
Categories:
  • IT
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Job Details

Develop verification testbench components for chip/module level using System Verilog, C & PerlUse high level language concepts (Object oriented, UVM/OVM/VMM etc) to develop extendable environment.Define and execute detailed verification plan from spec working with architects, designers, system engineers.Write tests, automate regression scripts and regression environment.Incorporate code-coverage, functional coverage, assertions, cover-groups etc to achieve 100% verification completeness prior to tapeout.Debug tests, run gate level simulations at unit/sdf delaysDevelop automated/scripted design flows for the above mentioned development processesParticipate in FPGA/silicon debug and analysisExcellent debugging skills in both SW and ASIC hardwareMust be proficient in Verilog (System Verilog preferred).Proficiency in scripting language like Perl, Tcl/Tk, Shell is a definite plus.Experience with simulators like ncVerilog (Incisive), VCS and QuestaSim.Good understanding of latest formal verification techniques, assertions, OOP etc is a plus.Understanding or prior experience with Industry standard protocols like USB, SPI, SATA, Ethernet, DisplayPort, SRIO etc is a definite plusBE/B.Tech, MS + 2-10 years of experience.
Degree: ME/ M.Tech./ MS (Engg/ Sciences)

Additional Degree: BE/ B.Tech (Engineering)

Experience: 2-7

Requirements

Application Programming | Graphic Designing/Animation/Web Designing | Quality Assurance/Testing | Software Engineer
Applying for this job will take you to an external site

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